TIM9904 Four-phase clock generator and driver

Pinout
Wiring
Timing diagrams
Electrical characteristics


Introduction

The TIM9904, also known as 74LS362, is in charge of producing the clock signals for the TMS9900 CPU. It can either use an external crystal with a tuning circuit to pick up the basic clock frequency, or receive a signal from an external oscillator.

It uses this basic frequency to issue four clock signals, each shifted by 1/4 of phase with respect to the previous one. These four signals are CMOS compatible. The TIM9904 also generates corresponding TTL-compatible signals, but inverted. Note that only the TMS9900 CPU needs four (CMOS) signals, other chips in the TI-99/4A use only one TTL signal (PHI3*).

The TIM9904 also contains a D flip-flop that can be used to generate a reset signal.


Pinout

      +----+--+----+ 
TANK1 |1 o 20| Vcc
TANK2 |2 T 19| XTAL2
GND1 |3 I 18| XTAL1
FFQ |4 M 17| OSCIN
FFD |5 16| OSCOUT
PHI4* |6 9 15| PHI2*
PHI3* |7 9 14| PHI1*
PHI3 |8 0 13| Vdd
PHI4 |9 4 12| PHI1
GND2 |10 11| PHI2
+------------+

Power supply
Vcc: +5V
Vdd: +12V
GND1 and GND2: ground

Frequency generator
XTAL1 and XTAL2 are used to connect a crystal. If an oscillator is used, they should be connected to Vcc.

TANK1 and TANK2 are used to connect a LC resonnant circuit that picks up one of the frequencies from the crystal. If an oscillator is used they should be connected to each other with a 130 Ohm resistor.

OSCIN is used to input a TTL signal from an external oscillator. If a crystal is used, this pin should be connected to Vcc via a 4.7KOhm resistor.

Clock signals output
PHI1 to PHI4 are the four clock signals meant for CMOS chips (+12V). They all have the same frequency, but are shifted by 1/4 of a phase. They are meant to be connected to the corresponding inputs pins of the TMS9900, via 16 Ohm resistors (to minimize overshoots).

PHI1* to PHI4* are the same signals but inverted. They are meant to control TTL chips (+5V).

OSCOUT oscillator signal. TTL output that mirrors either OSCIN or the output of the internal oscillator controlled by the crystal and the tuning circuit (generally 3MHz).

Flip-Flop
FFD Flip-flop input (Schmidt-trigger).

FFQ Flip-flop output. Connected to the RESET* pin of the TMS9900 on the TI-99/4A The flip-flop uses PHI3 as an internal clock signal to latch the value on the FFD pin and present it on FFQ.



Wiring

Crystal oscillator

The TIM9904 comes in two versions: the original TIM9904 (aka 74LS362) requires a quartz crystal with a fundamental frequency of 48 MHz (it could be pushed to 54 MHz at max). This frequency is internally divided by 16 to generate the 3 MHz clock signal. A subsequent version, the TIM9904A requires a 12 MHz crystal, but can also accept a 16 MHz crystal. In this case, the frequency will be divided by 4 to generate the 3MHz clock signals (4MHz with a 16 Mhz crystal). The quartz should be a serial-type crystal, with a 20-75 Ohm resistance and a minimum of 6 mW power dissipation. The suggested stability is 0.005% from 0 to 70 `C.

For best results, a LC tuning circuit should be used. Both the crystal and the LC circuit must be located close to the chip.

            +----------+         
+----| XTAL1 |
=== | |
+----| XTAL2 |
| |
+--+--| TANK1 |
( | | |
L ( = C| |
( | | |
+--+--| TANK2 |
| |
Vcc--www--| OSCIN |
4.7K +----------+

The resonnant frequency of the tuning circuit is calculated as:

Fosc =        1       
2*Pi*Sqrt(L*Ct)

L is the inductance of the coil
Ct is the sum of the external capacitor C and the capacitance of the printed circuit board Cb.

If you have a console with a 12 MHz quartz, it is possible to replace it with a 16 MHz, so as to speed up your TI-99/4A by 33% ! A better solution would be to install a SPDT switch that lets you connect either the original quartz or the 16 Mhz one. This is because many programs expect the TI to run at a 3 MHz speed: disk controller, RS232 card, etc. Having a switch lets you select "turbo" mode only when you need it (although flipping the switch "on the fly" will probably crash the TI-99/4A).


External oscillator

            +----------+          
Vcc----| XTAL1 |
| |
Vcc----| XTAL2 |
| |
+------| TANK1 |
| | |
+-www--| TANK2 |
130 Ohm| |
| |
+----+ | |
| Osc|------| OSCIN |
| | +----------+
+----+

The external oscillator must have a frequency 4 times higher than the desired frequency. Its duty cycle (i.e. duration of the high pulse over total period) must be between 25 and 50%. Successive pulses will trigger the four clock signals one after the other.


Reset circuit

In the TI-99/4A console, the hardware reset circuit is the following:

     12K     150K 
+5V--www--+--www--+---Gnd
| |
+--||---'
| 22 uF
|
| 47K
+--www---+-----------< Module port, pin #1
| |
+--||----'
| 22 uF
|
|
| +-----------+
'---| FFD_ |
| \__FFQ|---+------- RESET* pin on TMS9900
| ^ | +------- SYNC RESET pin on VDP
| | | +------- RST1* pin on TMS9901
| Phi 3 | |
| | '--|>o---|>o---> Side port, pin #3
+-----------+

The 12K resistor to Vcc normally maintains FFD high, and no reset signal is generated. The first RC circuit is used to generate a reset signal at power up: FDD is connected to ground until the capacitor is charged enough (the resistor is used to discharge the capacitor when power is turned off). The second RC circuit plays the same role for external reset signals: to reset the TI-99/4A, connect pin 1 of the module port to the ground. This is what happens when you plugged in a new cartridge. You could also install a push-button there.

When FFD is low, the next PHI3 pulse will send this value to the FFQ output. From there it goes to the RESET pins of the three microprocessors in the console: the CPU, the VDP and the TMS9901. It is also present in the side connector, pin 3, after being amplified by passing through two 74LS04 inverters.


Bypass capacitors

This circuit is used in the TI-99/4A to filter noise on the power supply lines.

 +12V--UUU---+---||----Gnd 
6.8uH | 0.1 uF
| +----------+
+--------------| Vdd |
| |
1 uF | GND1 |---Gnd
+5V--+----------||----Gnd | |
| | GND2 |---Gnd
+--UUU---+--||---Gnd | |
6.8 uH | 1 nF | |
| | |
+------------| Vcc |
+----------+


Timing diagrams

External oscillator timing

  _      _      _      _      _      _
_| |____| |____| |____| |____| |____| |__ OSCIN
_____ ______
___/ \_____________________/ \__ PHI1
_____ __
__________/ \_____________________/ PHI2
_____
_________________/ \_________________ PHI3
_____
________________________/ \__________ PHI4



Switching characteristics

  |          a            |
|_ b | _c __/ \____________________/ \_______________________ PHI1
__ __
________/ \____________________/ \_________________ PHI2
|d| __ __
______________/ \____________________/ \___________ PHI3
__ __
____________________/ \___________________/ \______ PHI4
___ _____________g__h___ ______________________
\__/ e f \__/ PHI1*
________|| ||____________________ ________________
\__/ \__/ PHI2*
_______________ _________________________ _____
\__/ \__/ PHI3*
_____________________ _______________________ _
\__/ \__/ PHI4*
_ _ i _ _ _ _ _ _
\___/ \___/ \___/ \___/ \___/ \___/ \___/ \___/ \___ OSCOUT
______
______________/ j | k\_______________________________ FFD
______________________
___________________/ \__________ FFQ
||l ||m
# Parameter (at 3 MHz) Min Typ Max Unit
a Cycle time 300 333 500 ns
b Delay between pulses in diff phase 55 63 - ns
c Pulse with any PHI 40 60 - ns
d Delay pulse low, next phase high 0 1 5 ns
e Delay PHIn high, PHIn* low -20 -13 0 ns
f Delay PHIn low, PHIn* high -20 -13 -5 ns
g Rise time, any PHI 5 - 20 ns
h Fall time, any PHI 5 9 20 ns
i Pulse width, OSCOUT 18 30 - ns
j FFD setup time before PHI3 \ 70 - - ns
k FFD hold time after PHI3 \ 0 - - ns
l Delay PHI3 low, FFQ high -18 -8 -2 ns
m Delay PHI3 low, FFQ low -18 -8 -2 ns



Electrical characteristics

Absolute maximum ratings

Supply voltage: Vcc              7V
Vdd 12V
Input voltage: OSCIN 5.5V
FFD -0.5 to 7V
Free air temperature: 0 to 70 `C
Storage temperature: -40 to 85 `C



Recommended operating conditions

Parameter Min Nom Max Unit
Supply voltage Vcc 4.75 5 5.25 V
Supply voltage Vdd 11.4 12 12.6 V
High-level output current PHI1-4 - - -100 uA
Ditto, all other outputs - - -400 uA
Low-level output current PHI1-4 - - 4 mA
Ditto, all other outputs - - 8 mA
Internal oscillator frequency - 12 - MHz


Characteristics under recommended conditions

Parameter Test conditions Min Typ Max Unit
High-level input voltage - 2 -
V
Low-level input voltage, FDD - - - 0.5 V
Low-level input voltage, OSCIN - - - 0.8 V
Hysteresis, FDD - 0.4 0.8 - V
Input clamp voltage Vcc=4.75 V, Vdd=11.4 V, I=18 mA - - -1.5 V
High-level output voltage, PHI1-4 Vcc=4.5 V, I=-100 uA Vdd-2 Vdd-1.5 Vdd V
Ditto, all other outputs Vdd=11.4-12.6 V, I=-400 uA 2.7 3.4 - V
Low-level output voltage, PHI1-PHI4 Vcc=4.75 V, Vdd=11.4 V, I=4 mA - 0.25 0.4 V
Ditto, all other outputs Vcc=4.75 V, Vdd=11.4 V, I=4 mA
I=8 mA
- 0.25
0.35
0.4
0.5
V
Input current at max input volt, FDD Vcc=5.25 V, Vdd=12.6 V, Vi=7 V - - 0.1 mA
Ditto, OSCIN Vcc=5.25 V, Vdd=12.6 V, Vi=5.5 V - - 0.3 mA
High-level input current, FDD Vcc=5.25 V, Vdd=12.6 V, Vi=2.7 V - - 20 uA
Ditto, OSCIN Vcc=5.25 V, Vdd=12.6 V, Vi=2.7 V - - 60 uA
Low-level input current, FDD Vcc=5.25 V, Vdd=12.6 V, Vi=0.4 V - - -0.4 mA
Ditto, OSCIN Vcc=5.25 V, Vdd=12.6 V, Vi=0.4 V - - -1.6 mA
Short circuit output current
all except PHI1-PHI4 (not protected)
Vcc=5.25 V, one at a time, 1 sec -10 - -100 mA
Supply current from Vcc Vcc=5.25 V, FDD+OSCIN=0, T=0-70 `C - 65 85 mA
Ditto, at 3 MHz Vcc=5.25 V, Vdd=12.6 V, T=0-70 `C - 71 95 mA
Ditto, at 4 mHz Vcc=5.25 V, Vdd=12.6 V, T=0-70 `C - 73 95 mA
Supply current from Vdd Vcc=5.25 V, FDD+OSCIN=0, T=0-70 `C - 14 24 mA
Ditto, at 3 MHz Vcc=5.25 V, Vdd=12.6 V, T=0-70 `C - 40 48 mA
Ditto, at 4 mHz Vcc=5.25 V, Vdd=12.6 V, T=0-70 `C - 47 52 mA

Revision 1. 2/19/99. OK for release
Revision 2. 3/30/99. Polishing
Revision 3. 5/10/99. Added info on the TIM9904A


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